欧美一级婬片免费午夜视频_88精品国产免费_午夜宅男国产在线播放_亚洲高清无码在线观看_免费A级毛片在线播放不收费

關(guān)注微信 意見(jiàn)反饋

掃描關(guān)注摩爾人半導(dǎo)體招聘

摩爾人招聘
確定

您已提交成功

查看幫助中心
對(duì)職位有興趣?上傳您的簡(jiǎn)歷無(wú)需注冊(cè),即可直接投遞您心儀的職位
格科微電子(上海)有限公司

模擬芯片設(shè)計(jì)

收藏職位
  • 我要分享
  • 20萬(wàn)-40萬(wàn)/年
  • 上海
  • |
  • 工作經(jīng)驗(yàn)不限
  • |
  • 碩士
  • |
  • 全職

職位誘惑: 年終獎(jiǎng)金,五險(xiǎn)一金,年底雙薪,股票期權(quán),年度旅游,成長(zhǎng)空間大,通訊津貼,交通補(bǔ)助,節(jié)日禮物,技能培訓(xùn),天天下午茶,技術(shù)領(lǐng)先,福利好,老板nice

發(fā)布時(shí)間: 2019-01-15發(fā)布

職位描述


Position: Analog Design Engineer
Responsibilities

  1. Responsible for design consumer IC circuit structure, analog circuit design  and simulation;
  2. Be responsible for the CIS in MIPI D - PHY and PLL circuit simulation, layout, post simulation, as well as the MIPI signal transmission speed and quality of some of the test, the late finish MIPI work with PLL pass down.
  3. Responsible for SOC BALL design and SOC IO PAD/DRAM micro PAD circuit simulation, layout, post simulation.
  4. Responsible for the CIS in the column, row, charge pump, bandgap and pixel voltage vpix produce the modules such as circuit design, simulation, layout and test related modules.
  5. Responsible for the integral design of the COL - ADC, including each module circuit design, the overall timing control, circuit simulation, after the chip layout, layout;
  6. Responsible for the low power design of DRAM
Requirement:
  1.  Electronic master degree or above, 1years or above related working experience;
  2.  Familiar with the process of landscape design of mixed signal ICS, mastering the LVS/DRC;
  3.  IC analog design, have the following experience: single or multiple design reference voltage circuit, bandgap, adc and dac charge pump circuit, and oscillator circuit design etc.
  4. Good English reading and writing ability and the team cooperation spirit.

職位發(fā)布者

Sarah

HR

7天

簡(jiǎn)歷處理用時(shí)

100%

簡(jiǎn)歷及時(shí)處理率

您還未登錄。已有賬號(hào), 點(diǎn)此登錄,直接投遞

推薦朋友

一鍵投遞