Brief Job Description
Be a chip architecture planner to provide a competitive and valuable solution to sales and customers. This role will consolidate a project scope by achieving technology feasibility and competitiveness study, resource and schedule planning, cost break down for quotation.
Responsibility:
1. Pre-sale technical tasks and RFQ follow up.
2. Architecture planner to propose total solution of algorithm, design, IP, P&R, software, process, package, testing, yield and reliability wrt application scenarios and RFQ.
3. Assessment to the feasibility, competitiveness and risk of proposed total solution.
4. Share solution knowledge base of historical projects within focused fields.
5. Connect and coordinate cross-departments with customers for solution proposal.
6. Project schedule planning and resource evaluation.
7. Cost break down for quotation proposal.

Job Requirements
1. MSEE, 6+ years or BSEE, 8+ years with university grad of Ele. Eng., Computer Eng. and Computer Sci.
2. 6+ years experiences in engineering of AI, SSD, Wireless, High Speed I/F, Multimedia and Automotive.
3. Familiar with ASIC IC design, manufacturing and production flow.
4. Strong leadership and problem-solving skill are required.
5. Ability to follow through open issues under stress.
6. Fluent oral, written, communication and presentation skills with Mandarin and English. Japanese and Korean is a plus.
7. Team player, dedicated, organized and motivated.
8. Available for business trips.