Company Description
Synaptics is the pioneer and leader of the human interface revolution, bringing innovative and intuitive user experiences to intelligent devices. Synaptics’ broad portfolio of touch, display, biometrics, voice, audio, and multimedia products is built on the company’s rich R&D, extensive IP and dependable supply chain capabilities. With solutions designed for mobile, PC, smart home, and automotive industries, Synaptics combines ease of use, functionality and aesthetics to enable products that help make our digital lives more productive, secure and enjoyable. (NASDAQ: SYNA) www.synaptics.com.
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Job Responsibilities
？ Design/verification of SoC-level logic including clock, reset.
？ All DFT related rtl level logics include Pinmux, Scan, At Speed Scan, Mbist, Boundary scan, and Testbus design and verification.
？ Physical implementation including chip synthesis and all DFT related logic insertion and verification.
？ Timing constraint/SDC develop and timing closure at functional reg to reg and IO/DFT timing, crosstalk analysis, etc.
？ Support product testing and debug manufacture failures.
？ Low power design includes power analysis, architecture definition and methodology development.
？ Scripting, Unix shell, TCL

Required Qualifications
? BSEE/MSEE + 3-5 years hands on SOC integration or Physical Implementation
? Good skill of English for reading, writing.
? RTL design and synthesis.
? Experience of supporting DFT.
? Experience on Static timing, timing closure, and noise analysis.
? Experience on Cadence EPS and CPF flow will be a plus.

工作描述：
- 系統(tǒng)芯片集成和驗(yàn)證，包括芯片時(shí)鐘，復(fù)位電路設(shè)計(jì)和驗(yàn)證。
- DFT相關(guān)邏輯設(shè)計(jì)，包括pinmux, scan, at speed scan, mbist, boundary scan, testbus等設(shè)計(jì)和驗(yàn)證。
- 物理實(shí)現(xiàn),包括芯片綜合，DFT邏輯插入和驗(yàn)證。
- 時(shí)序約束定義，包括功能，IO，DFT時(shí)序收斂，串?dāng)_分析等等。
- 支持產(chǎn)品測(cè)試和制造缺陷分析。
- 低功耗設(shè)計(jì)，包括功耗分析、結(jié)構(gòu)和方法定義。
- Unix, TCL等編寫腳本。
職位需求：
- 碩士或者本科3到5年系統(tǒng)集成和物理實(shí)現(xiàn)工作經(jīng)驗(yàn)。
- 良好的英語(yǔ)讀寫能力。
- RTL設(shè)計(jì)和綜合。
- DFT設(shè)計(jì)經(jīng)驗(yàn)。
- 具有靜態(tài)時(shí)序分析，時(shí)序收斂以及串?dāng)_分析能力。
- 熟悉Cadence EP/Synopsys和CPF流程者優(yōu)先。