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測(cè)試驗(yàn)證工程師

收藏職位
  • 我要分享
  • 12萬-16萬/年
  • 上海
  • |
  • 1-3年
  • |
  • 本科
  • |
  • 全職

職位誘惑: 技術(shù)領(lǐng)先,成長(zhǎng)空間大,節(jié)日禮物,年度旅游,技能培訓(xùn),五險(xiǎn)一金

發(fā)布時(shí)間: 2019-12-09發(fā)布

職位描述

Responsibilities:

  • Platform system engineer will be key person to drive IP validation and bring-up including any of AMD IPs or domains (Ethernet, memory, PCIE, power management, nbif, Southbridge, etc.)
  • Work closely with IP design team to define IP validation test plan for both pre-silicon (emulation) and post-silicon
  • Lead ASIC/ IP feature bring-up and validation, ensure coverage and schedule will meet Ax/Bx tape-out date
  • Drive cross-team (ASIC design, platform, driver) collaboration to enable IP features and optimize performance
  • Lead related engineering teams(global) to debug related issues for this IP
  • Work with characterization team to figure out the optimize for this IP
Requirements:
  • B.S. or M.S. In EE or CS or equivalent is required
  • Good English required - verbal and written
  • A minimum of 5+ years' experience on low level FW/SW development or ASIC design verification
  • Hands-on experience with any one of ASIC bring up, power management, PCI-E, Ethernet is preferred.
  • Strong debugging and testing skills
  • Strong communication skills
  • Strong leadership for issue debug and program driving
  • Familiar with schematic / PCB layout
  • Familiar with Linux XGBE Debug
  • Familiar with Windows XGBE Debug
  • Expert in Ethernet (10G/1G/100M/10M) Protocol
  • Familiar with Firmware Development and Debug

職位發(fā)布者

裴瑾

HR

3天

簡(jiǎn)歷處理用時(shí)

100%

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