崗位職責:
1. Library circuits design and optimize, pre/post simulation, and optimization for performance, power and area.
2. Work closely with layout engineer. Provide the guideline and help for physical layout floor plan, design, verification and RC extraction.
3. Generate all needed front end & Back end views, including .lib, Verilog, ATPG, apache, LEF, GDS… and have a QA on them.
4. Support Front end & Back end team.

任職資格:
1. Good knowledge of circuits design. Experience in Std. Cell, I/O, ESD SRAM, memory compiler, non-volatile memory, charge pump, band gap and other mixed-signal/analog IP preferred.
2. Unix/Lunix system experience and Good programming skills preferred, such as C, Python, TCL etc.
3. Experience in FinFET process or high-reliability circuit design will be better
4. Self-motivated and hard work, Intelligent and excellent analysis capability.
5. Bachelor/Master degree in Electrical Engineering, Computer Science, and Applied Physics