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沃瑞咨詢【專業(yè)半導體獵頭】

資深模擬設計工程師(高速ADC,PLL,Serdes)

收藏職位
  • 我要分享
  • 40萬-70萬/年
  • 上海
  • |
  • 3年以上
  • |
  • 碩士
  • |
  • 全職

職位誘惑: 年終獎金,股票期權,技術領先,成長空間大

發(fā)布時間: 2019-10-09發(fā)布

職位描述

Position : Analog Design Engineer

Responsibilities:
n Take charge of key IP development for analog/mix-signal IC design project and ensure the quality
n Design, simulation and verification of analog circuits
n Guide layout engineer design
n Cooperate with application and product engineers and test engineers to make the product successfully enter mass production;
n Responsible for design documentation.
Requirements:
n MS degree or above with 3+ years’ experience in IC industry
n Solid understanding on circuit analysis, verification and IC design technology
n Good silicon debug capability
n Experience in designing one or more of the following circuits: Band-gap, LDO, oscillator, IO, ESD, ADC, DAC, PLL, VCO, regulator, filter, SERDES, etc.
n Experience in designing high-speed and high-resolution ADC/DAC is preferred.
n Solid problem-solving and trouble-shooting skills. Enjoy thinking, taking things apart and making things work.
n Self-motivation, result oriented, good team work and communication skills.
 

職位發(fā)布者

Jessica QIN 秦孫佳

Consultant

7天

簡歷處理用時

100%

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