Job Description:
Design, simulate and verify high speed CMOS analog and mixed-signal circuits;
Conduct high speed serial link system behavioral modeling;
Supervise layout floor plan and design of IC blocks;
Help define specifications of IC blocks and create design documentation;
Do silicon test, characterization and debugging;
Share knowledge / make presentation within design team.
Qualification:
MSEE or above with minimum 3 years of working experience;
Strong experience in DFE (Decision Feedback Equalizer) or CDR (Clock Data Recovery) circuit design;
Experience in DDR or other high speed designs (e.g. PCIe, HDMI, SerDes) is preferred;
Good system level knowledge on high speed serial link;
Strong lab experience in silicon debugging, good understanding on lab instruments (e.g. oscilloscope, network analyzer);
Ability to supervise layout floor plan and design;
Good understanding on deep submicron CMOS technology process and device physics;
Proficiency of EDA design tools (Virtuoso, Spectre, HSPICE, AMS, etc.);
Experiences in Verilog, Verilog-A and/or Matlab;
Good communication skill and good command of written English are highly desired.